The present invention is directed toward memory arrays, and more particularly to a memory array and a method for electrically coupling memory cell access devices to a word line.
Three-dimensional (3D) memory arrays with several stacking layers provide very high memory densities. These 3D memory architectures call for selector devices which can be fully integrated in a back end of line (BEOL) process. In general, during the BEOL process the word line must be electrically coupled to the memory cell access devices of the memory array. The BEOL process may have a low thermal budget. Furthermore, two terminal selector devices typically have been integrated in a BEOL process. These two terminal diode-type devices have poor current controllability.